Rambus Inc. has launched a SOCAMM2 (Small Outline Compression Attached Memory Module) chipset designed to enable low-power, high-performance LPDDR5X-based memory modules for AI server platforms.

The SOCAMM2 chipset represents the first step in a broader Rambus roadmap of LPDDR-based server module solutions, reflecting the company’s ongoing collaboration with industry partners to support new memory architectures optimized for evolving workloads in AI data center infrastructure. This new product family extends the comprehensive Rambus offering of complete memory interface chipsets for all JEDEC-standard DDR5 and LPDDR5 memory modules.

The rapid diversification and expansion of data center workloads driven by AI is reshaping system requirements, heightening the need for purpose-built solutions that optimize for power, efficiency, form factor and memory scalability. SOCAMM2 memory modules, based on LPDDR technology, are emerging as an innovative architectural approach to address these challenges by delivering high performance with lower power consumption in a modular, serviceable, board area efficient form factor.

The Rambus SOCAMM2 chipset is designed to support this transition by providing the critical control, telemetry, and power delivery functions required by JEDEC-standard SOCAMM2 memory modules in demanding AI server environments.

SOCAMM2 replaces soldered LPDDR memory with detachable, upgradable modules that combine LPDDR efficiency with server-class serviceability in the data center. The Rambus LPDDR5X SOCAMM2 chipset supports reliable, power-efficient operation of LPDDR-based server memory modules at up to 9.6 Gb/s and includes an SPD Hub for module identification, configuration, and telemetry; and a 12A and 3A voltage regulators for localized, efficient power conversion.

By: DocMemory
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