JEDEC Solid State Technology Association has released an updated version of its LPDDR5/5X Serial Presence Detect (SPD) specification, introducing new guidance designed to improve power-efficient performance across devices that use the memory technology.

The revised document, JESD406-5D, builds on the previous Revision C standard and includes additional parameters that allow system designers to calculate recovery times when switching between operating modes. The update is available to download free of charge on the JEDEC website.

LPDDR5/5X memory supports two distinct timing modes: a full-speed setting for peak performance and a reduced-speed, lower-power mode. This dual-mode capability is widely used in mobile devices to extend battery life and is increasingly being adopted in data-centre environments as demand for energy-efficient components grows.

The new version of the SPD standard outlines the key information required to determine how long systems need to transition between fast and low-power states. By making these calculations more precise, the update is intended to help manufacturers improve overall system responsiveness without compromising power efficiency.

“Reducing power consumption has become imperative for computing systems as the use of AI and other demanding applications accelerate,” said Bill Gervasi, Chair of the JEDEC SPD Task Group. “The updates to the JESD406-5 standard are an important enabler for systems to optimise performance while maintaining a lower power profile.”

By: DocMemory
Copyright © 2023 CST, Inc. All Rights Reserved