Semidynamics announced its expansion into full-stack AI infrastructure solutions and revealed that it has taped out its designs at 3 nm with TSMC. As a collaborator in various programs backed by the EuroHPC Joint Undertaking, the Barcelona, Spain-based company could mark a step forward for Europe’s semiconductor ambitions.

“We started as an IP company selling our processor, vector unit, and tensor unit designs,” Iakovos Stamoulis, CTO at Semidynamics, told EE Times. “We are now becoming a vertically integrated AI hardware supplier, where we use our already proven IP technology to create our own silicon products available in boards and racks in due course.”

3-nm ready

Semidynamics designs process-agnostic IP cores. The company’s IP cores, including Cervell NPU and Atrevido, are compatible with 5-nm and more mature process nodes. “To be competitive in today’s landscape, we need to use cutting-edge technology, such as 3 nanometers,” Stamoulis said. By taping out its designs with TSMC, Semidynamics is “testing all our technologies and ensuring we have a solution that is functional, operational, and within our power, performance, and area limits at 3 nm.”

While the company hasn’t revealed a detailed timeline for its vertical integration and 3-nm tape-out, the overriding implications of the announcement for European sovereignty are difficult to ignore.

Is the push for AI cornering the EU’s digital sovereignty? Europe’s chip independence remains uncertain amid the push to build AI factories, gigafactories, and supercomputers in Europe, as outlined in the EU’s AI Continent Action Plan. The continent accounts for only 4% of the global AI compute power, while it depends on others to fulfill its own demand [1]. The European Commission has pledged to have at least 13 operational AI factories by 2026 and up to five AI gigafactories [2]. Considering its world share of chip production is just under 10%, Europe might rush into these AI factories with non-sovereign hardware.

“Reality check: A lot of GPU procurement for AI factories will probably be from the other side of the Atlantic, but we want to have European solutions—European silicon, European software, European racks—as part of these AI factories and gigafactories,” Stamoulis said, urging for Europe’s digital sovereignty. Yet the European HPC ecosystem is heavily reliant on non-EU chips; JUPITER, Leonardo, Lumi, and other European supercomputers deploy GPUs like Nvidia’s A100 Ampere and GH200 Grace Hopper superchips, while Finland’s Lumi is powered exclusively by 11,912 AMD MI250X GPUs.

Currently, Europe’s digital sovereignty strategy focuses on bolstering design capabilities and IP development within the region [3]. Public and private funding have aligned with this goal, supporting companies that are developing sovereign processors and accelerators for AI data centers and high-performance computing applications.

A notable example is France-based company SiPearl, which closed a €130 million (~$153 million) Series A to develop and produce its Rhea1 microprocessor—now powering Germany’s JUPITER supercomputer [1].

Semidynamics hasn’t publicly detailed its vertical integration plans, but unlike SiPearl, Semidynamics is likely to be using its own internal AI IP (core, vector, and tensor) for this development. The IP is not only fully European in origin, but also fully open, built on the RISC-V standard rather than the proprietary Arm architecture.

Open ISA may (better) keep pace with AI evolution Stamoulis argued that choosing RISC-V has accelerated development by enabling access to a broad tooling and testing ecosystem. The open ISA advances collaboratively: compiler toolchains, simulators, and libraries are integrated upstream into LLVM, GCC, and the Linux kernel well before silicon chips. Semidynamics boasts delivering a beta RTL design and FPGA bitstream to customers ahead of first tape-out, thanks to RISC-V, allowing software development and hardware verification to run in parallel. Because AI and HPC workloads evolve rapidly, a proprietary ISA vendor’s approval cycle risks lagging behind industry needs. The industry’s demands and bottlenecks might have changed by then.

Stamoulis continued, “Adopting RISC-V is a relatively future-proof decision that allows our customers to develop tailored software for our hardware and benefit from continuous future optimizations provided by the broader RISC-V ecosystem.”

Resolving memory bottlenecks Semidynamics claims it can “break the memory wall” with its proprietary memory subsystem for AI workloads. John Peddie Research describes the company’s memory approach as an “important differentiator,” citing the “increasing demand for inference solutions that can scale efficiently across real-world workloads and deployment environments.” Based on its Gazzillion Misses technology, Semidynamics claims to overcome significant memory bottlenecks.

“We combine a very large memory capacity with our Gazzillion Misses technology, which supports up to 128 simultaneous cache misses per core,” Stamoulis said. Typical processors support only 16 to 20 outstanding misses, which means they stall frequently when accessing large memory pools, requiring multiple connected GPUs to achieve similar performance.

“Gazzillion frees up the compute capabilities of the same GPU,” Stamoulis said. “Our innovation keeps a single chip continuously fed with data from very large memory. So, you don’t need multi-GPU configurations.” Fewer GPUs translate into lower infrastructure costs, a meaningful advantage as AI stack expenses continue to climb.

The pressure to rapidly keep pace with the accelerating demands of AI is intensifying. If Europe can better align public funding, sovereign IP development, and manufacturing ambitions within a coherent strategy, it may narrow the gap with U.S. and Asian competitors—not by replicating Silicon Valley or Taiwan’s model, but by carving out a distinctly European path to technological self-reliance.

By: DocMemory
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