SK hynix Inc. will present a new DRAM technology roadmap for the next 30 years and the direction for a sustainable innovation at the IEEE VLSI (Institute of Electrical and Electronics Engineers Very Large Scale Integration) 2025 symposium being held from June 8–12 in Kyoto, Japan.

Cha Seon Yong, Chief Technology Officer (CTO) of SK hynix, will deliver on June 10 a plenary session on “Driving Innovation in DRAM Technology: Towards a Sustainable Future.”

In his speech, Cha will explain why it is increasingly difficult to improve performance and capacity with scaling through current technology platforms, and how to overcome such limitations.

CTO Cha will also introduce 3D DRAM, the main pillar for the future DRAM along with the VG (Vertical Gate) platform. Along with structural breakthrough, the company will also strive to find a new growth engine by sophisticating technologies of critical materials and components of DRAM to lay foundation for the next 30 years.

On the last day of the event, Joodong Park, vice president who leads the Next Gen DRAM TF, will present his findings from a recent research on how VG and wafer bonding technology affect the electrical characteristics of DRAM.

By: DocMemory
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